Thank you all for your kind help. I finally took the abovementioned files from Martin Thomas an merged them mit the demo from FreeRTOS.org. Acutally I completely replaced the linker script, kept
CstartupSAM7.c and just joined the two startup-files
boot.s and
Cstartup.S which resulted in the code below. It’s working.
/*------------------------------------------------------------------------------
//*- ATMEL Microcontroller Software Support - ROUSSET -
//*-----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//*- File source : Cstartup.s
//*- Object : Generic CStartup for KEIL and GCC
//*- Compilation flag : None
//*
//*- 1.0 18/Oct/04 JPP : Creation
//*- 1.1 21/Feb/05 JPP : Set Interrupt
//*- 1.1 01/Apr/05 JPP : save SPSR
//*
//* This file (along with the linker script and Cstartup_SAM7.c) was taken from
//* Martin Thomas due to it's support for C++. Originally it also allowed to
//* place parts of code as well as the vectors in ROM. This functionality was
//* removed by Sven Gruener in Aug/2011 while adapting it to FreeRTOS
//*---------------------------------------------------------------------------*/
.print "ROM-Version: Vectors at start of Code, just variables in RAM"
/*-----------------------------------------------------------------------------
//*- Exception vectors
//*--------------------
//*- These vectors can be read at address 0 or at RAM address
//*- They ABSOLUTELY requires to be in relative addresssing mode in order to
//*- guarantee a valid jump. For the moment, all are just looping.
//*- If an exception occurs before remap, this would result in an infinite loop.
//*- To ensure if a exeption occurs before start application to infinite loop.
//*--------------------------------------------------------------------------*/
.print "Vectors in section .vectorg -> .text"
.section .vectorg, "ax"
LDR PC,Reset_Addr /* 0x00 Reset handler */
LDR PC,Undef_Addr /* 0x04 Undefined Instruction */
LDR PC,SWI_Addr /* 0x08 Software Interrupt */
LDR PC,PAbt_Addr /* 0x0C Prefetch Abort */
LDR PC,DAbt_Addr /* 0x10 Data Abort */
NOP /* 0x14 reserved */
LDR PC,[PC,#-0xF20] /* 0x18 IRQ */
LDR PC,FIQ_Addr /* 0x1c FIQ */
Reset_Addr: .word InitReset
Undef_Addr: .word Undef_Handler
SWI_Addr: .word vPortYieldProcessor /* in portISR.c */
PAbt_Addr: .word PAbt_Handler
DAbt_Addr: .word DAbt_Handler
/*IRQ_Addr: .word IRQ_Handler_Entry */
FIQ_Addr: .word FIQ_Handler
Undef_Handler: B Undef_Handler
PAbt_Handler: B PAbt_Handler
DAbt_Handler: B DAbt_Handler
FIQ_Handler: B FIQ_Handler
/*--- End of exception vectors ----------------------------------------------*/
.arm
.section .init, "ax"
.global _startup
.func _startup
_startup:
reset:
.RAM_TOP:
.word __TOP_STACK
InitReset:
/*-----------------------------------------------------------------------------
/*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
/*---------------------------------------------------------------------------*/
/*- minumum C initialization, call AT91F_LowLevelInit( void) */
.extern AT91F_LowLevelInit
ldr sp, .RAM_TOP /* temporary stack in internal RAM (**) */
/*--Call Low level init function in ABSOLUTE through the Interworking */
ldr r0,=AT91F_LowLevelInit
mov lr, pc
bx r0
/*------------------------------------------------------------------------------
//*- Stack size and location Definition
//*------------------------------------
//*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
//*- the vectoring. This assume that the IRQ management.
//*- The Interrupt Stack must be adjusted depending on the interrupt handlers.
//*- The System stack size is not defined and is limited by the free internal
//*- SRAM.
//*---------------------------------------------------------------------------*/
/* Stack Sizes */
.equ UND_STACK_SIZE, 0x00000004
.equ ABT_STACK_SIZE, 0x00000004
.equ FIQ_STACK_SIZE, 0x00000004
.equ IRQ_STACK_SIZE, 0X00000400
.equ SVC_STACK_SIZE, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.equ MODE_USR, 0x10 /* User Mode */
.equ MODE_FIQ, 0x11 /* FIQ Mode */
.equ MODE_IRQ, 0x12 /* IRQ Mode */
.equ MODE_SVC, 0x13 /* Supervisor Mode */
.equ MODE_ABT, 0x17 /* Abort Mode */
.equ MODE_UND, 0x1B /* Undefined Mode */
.equ MODE_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
/*------------------------------------------------------------------------------
//*- Setup the stack for each mode
//*-------------------------------*/
mov r0, sp /* see (**) */
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0
/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
mov sp, r0 /* Init stack Sup */
/*------------------------------------------------------------------------------
//*- Relocation of .data section (ROM->RAM)
//*---------------------------------------*/
/* Relocate .data section (Copy from ROM to RAM)
This will also copy the .vectmapped and .fastrun */
LDR R1, =_etext
LDR R2, =_data
LDR R3, =_edata
LoopRel: CMP R2, R3
LDRLO R0, [R1], #4
STRLO R0, [R2], #4
BLO LoopRel
/*------------------------------------------------------------------------------
//*- Clear .bss section (Zero init)
//*-------------------------------*/
MOV R0, #0
LDR R1, =__bss_start__
LDR R2, =__bss_end__
LoopZI: CMP R1, R2
STRLO R0, [R1], #4
BLO LoopZI
/*------------------------------------------------------------------------------
//*- call C++ constructors of global objects
//*----------------------------------------*/
LDR r0, =__ctors_start__
LDR r1, =__ctors_end__
ctor_loop:
CMP r0, r1
BEQ ctor_end
LDR r2, [r0], #4
STMFD sp!, {r0-r1}
MOV lr, pc
/* MOV pc, r2 */
BX r2 /* mthomas 8/2006 */
LDMFD sp!, {r0-r1}
B ctor_loop
ctor_end:
/*------------------------------------------------------------------------------
//*- call main()
//*------------*/
ldr lr,=exit
ldr r0,=main
bx r0
.size _startup, . - _startup
.endfunc
/* "exit" dummy added by mthomas to avoid sbrk write read etc. needed
by the newlib default "exit" */
.global exit
.func exit
exit:
b .
.size exit, . - exit
.endfunc
/*----------------------------------------------------------------------------*/
.end