while(1)
{
readByte(); // function consume running state and other tasks are blocked
}
}
~~~~~~~
how can i implement next:
block task
BitDelay
unblock task
or
freertosBitDelay()
thank you
exact delay cycles in freeRTOS task
Hi All
I have implemented task with software USART receiver where is call USARTbitdelay routine.
This routine is implemented with delayus OR delayns based on delay_cycles(count)
delay have to be exact tick count but these routine consumes task running state time.
~~~~~~~
void readByte()
{
uses 8x bit delay function delay_cycles in ASF framework,
how can be implemented in FreeRtos delay alternative?
}
void task()
{
exact delay cycles in freeRTOS task
Looks like you’re using bit delay for sampling, so they have to be pretty precise, and I’m guessing pretty fast, much faster than 1mS. I’d suggest using a timer with an interrupt, set the timer to the sample period you want, and grab the bit there.
Keep some static variables so when you accumulate a byte, you could push it into a queue and use the queue as your blocking mechanism.
On Jun 12, 2014, at 2:17 PMEDT, Radoslav Jízdný jradoslav@users.sf.net wrote:
Hi All I have implemented task with software USART receiver where is call USARTbitdelay routine. This routine is implemented with delayus OR delayns based on delay_cycles(count) delay have to be exact tick count but these routine consumes task running state time. void readByte() { uses 8x bit delay function delay_cycles in ASF framework, how can be implemented in FreeRtos delay alternative? } void task() {} how can i implement next: block task BitDelay unblock task or freertosBitDelay() thank you exact delay cycles in freeRTOS task Sent from sourceforge.net because you indicated interest in https://sourceforge.net/p/freertos/discussion/382005/ To unsubscribe from further messages, please visit https://sourceforge.net/auth/subscriptions/while(1) { readByte(); // function consume running state and other tasks are blocked }
exact delay cycles in freeRTOS task
Hi Radoslav,
Yes same idea: install a timer interrupt, which takes RX samples at fixed intervals.
If the baudrate is 9600, the interrupt rate should be 3 to 5 times faster: 28.8 or 48 Khz.
If you want to make your timer interrupt ‘lighter’, you could put the samples in a circular buffer with a head and a tail pointer: the head for writing samples (from the interrupt) and the tail for reading them (from your task).
And as soon as you see a stable high (e.g. 8 bit times), you might want to call xSemaphoreGiveFromISR(), so your task will be woken up to process the received data.
A second method is installing a GPIO interrupt on the RX pin. When the interrupt fires you could register the current time and the RX value. This needs a high precision time, for instance the COUNT value of a fast running clock.
I have used both methods successfully. The GPIO interrupt gives a lower CPU load of course, but it is a bit more difficult to analyse the data.
Regards,
Hein
exact delay cycles in freeRTOS task
this sequential code is OK tested
~~~~~~
uint32_t bitDelayNS = 1000000000/baudRate;
int bcount = 8;
while(ioportgetpin_level(pin));
delay_ns(bitDelayNS>>1);
while(bcount–)
{
delayns(bitDelayNS);
*recByte >>= 1;
if(ioportgetpinlevel(pin))
*recByte |= 0x80;
}
delay_ns(bitDelayNS);
~~~~~~
here is coded under itnerupt but bytes sent by stdio is corupted.
timer is configured 10x faster half bit delay
baud rate is 4800
~~~~~~
define TC TC0
define CHANNEL 0
define IDTC IDTC0
define TCHandler TC0Handler
define TCIRQn TC0IRQn
ioportpint pin; main() {setpinAdr(&pin);
printf("INIT OKrn");
tc_config(96000); //periode is set 10*(half bit delay)
// Configure TC interrupts
NVIC_DisableIRQ(TC_IRQn);
NVIC_ClearPendingIRQ(TC_IRQn);
NVIC_SetPriority(TC_IRQn,0);
NVIC_EnableIRQ(TC_IRQn);
while(1);
}
define WAIT(n) (n*10)
void TC_Handler(void) { uint32_t dummy;
dummy = tc_get_status(TC,CHANNEL);
UNUSED(dummy);
if(usartState == 0)
{
if(ioport_get_pin_level(pin))
{
ioport_toggle_pin_level(LED3_PIO);
usartState = 1;
cntBits = WAIT(3); //3 x 0.5 delay
bcount = 8;
}
}
cntBits--;
if(usartState > 0 && !cntBits)
{
switch(usartState)
{
case 1:
{
if(bcount)
{
recByte >>= 1;
if(ioport_get_pin_level(pin))
recByte |= 0x80;
cntBits = WAIT(2); // 1 bit delay
--bcount;
}
else
{
putchar(recByte);
cntBits = WAIT(2);
usartState = 2;
}
}
break;
case 2:
usartState = 0;
break;
}
}
}
// Configuration function for the Timer.
static void tcconfig(uint32t freqdesired)
{
// INPUTS:
// freqdesired The desired rate at which to call the ISR, Hz.
uint32t uldiv;
uint32t ultcclks;
uint32t ulsysclk = sysclkgetcpuhz();
uint32t counts;
// Configure PMC
pmcenableperiphclk(IDTC);
// Configure TC for a 4Hz frequency and trigger on RC compare.
tcfindmckdivisor(
(uint32t)freqdesired, // The desired frequency as a uint32.
ulsysclk, // Master clock freq in Hz.
&uldiv, // Pointer to register where divisor will be stored.
&ultcclks, // Pointer to reg where clock selection number is stored.
ulsysclk); // Board clock freq in Hz.
tcinit(TC0, CHANNEL, ultcclks | TCCMR_CPCTRG);
// Find the best estimate of counts, then write it to TC register C.
counts = (ulsysclk/uldiv)/freqdesired;
tcwrite_rc(TC0, 0, counts);
// Enable interrupts for this TC, and start the TC.
tcenableinterrupt(TC,
CHANNEL,
TCIERCPCS); // Enable interrupt.
tc_start(TC,CHANNEL); // Start the TC.
}
~~~~~~
exact delay cycles in freeRTOS task
Hi Radoslav,
Your interrupt is not yet implemented the way it can work.
I attached a bit of code which isn’t perfect but it might give more ideas.
Regards,
Hein
exact delay cycles in freeRTOS task
thank you Hein
I have coded finall version of Software UART based on interrupts. edge detection start bit + timer counter that counter periode is max half delay of bit, freq = 2*baudrate Hz.
it is enough to call the handler 2 times for 1 bit sampling, without any while waiting. After receiving 1 byte timer counter is disabled and edge detecotor enabled.
57600 baud rate on 84Mhz sam3x was ok.
code has no error detection.
here is core:
complete code is attached
~~~~~~
typedef enum
{
eRS2322400 = 2400,
eRS2324800 = 4800,
eRS2329600 = 9600,
eRS23219200 = 19200,
eRS23238400 = 38400,
eRS23257600 = 57600,
eRS232_115200 = 115200,
}RS232Baud_t;
typedef struct structSWIRs232
{
RS232Baudt rs232Baud;
void (*receiveByte)(char);
Pio* pio;
uint32t pinNum;
uint32t PIOID;
IRQnType PIOIRQn;
}RS232SWIt;
void rs232intreceiverinit(RS232SWIt* rs232);
void rs232intreceiverenable(RS232SWIt* rs232);
void rs232intreceiverdisable(RS232SWI_t* rs232);
///core
void pinfallingedgehandler(uint32t a,uint32_t b)
{
pio_disable_interrupt(rs232base->pio, (1u<<rs232base->pinNum));
halfBitDelayCount = 3; //wait 1.5 bit
bitCount = 8;
usartState = 1;
tc_start(TC,CHANNEL); //reset counter
}
void TC_Handler(void)
{
uint32_t ul_status= tc_get_status(TC,CHANNEL);
UNUSED(ul_status);
if(!(--halfBitDelayCount))
switch(usartState)
{
case 1:
recByte >>= 1;//ROR
if(pio_get(rs232base->pio ,rs232base->PIO_ID, (1u<<rs232base->pinNum)))
recByte |= 0x80; //CARRY bit
if(!(--bitCount))
usartState = 2;//wait stop bit
halfBitDelayCount = 2; //wait 1 bit
break;
case 2:
//stop bit level is high
usartState = 0;
tc_stop(TC,CHANNEL);
rs232base->receiveByte(recByte);// send to buffer management
pio_enable_interrupt(rs232base->pio, (1u<<rs232base->pinNum)); //wait for falling edge
break;
}
}
~~~~~~
exact delay cycles in freeRTOS task
~~~~~
//initialization
RS232SWIt config =
{
.rs232Baud = 57600,
.pio = PIOA,
.pinNum = 26,
.PIOID = IDPIOA,
.PIOIRQn = PIOA_IRQn,
.receiveByte = &receiveByte
};
rs232_int_receiver_init(&config);
rs232_int_receiver_enable(&config);
~~~~~
exact delay cycles in freeRTOS task
Hi Radoslav,
That looks great, good work!
It’s a good idea to use a GPIO interrupt on a falling edge to start the TC timer for recognition, and switch it off at the stop bit.
Now it syncs on the start-bit, which should be good enough in most cases.
I made my algorithm to recognise a continuous stream of rs232 data from devices with a less precise clock and also for lower-quality hardware ( I want to be able to inform the hardware people and say: look at these errors! Otherwise software always gets the blame of a failure )
One remark: when you assign “usartState = 2”, you might want to “fall through” and stop the TC immediately, in order not the miss the GPIO interrupt of the next start bit?
TC interrupts may come too late, but never too early.
Wish you good luck,
Hein
exact delay cycles in freeRTOS task
Thank you Hein
I think , the error detection can be implemented on higher layer (checksumm etc.),
last stop bit delay is probably nessesary , because pinfallingedge_handler can raise on last data bit. time-moment for pin reading is exactly in half periode of pin level state:
state time element:
t0>—-reading T/2—-<t1 , T = 1s/BaudRate,
this time-read-position is set by first 1,5T delays from start bit.
edge handler raise at time moment = (t0 state start bit) + few const cycles = C and C << T.
C is time for edge detection processing + handler subroutine call instructions.